Simd_128

One 16-byte block viewed as every lane layout that fits it: _u8 (16 lanes) through _u64 (2 lanes), _float32 (4) and _float64 (2). All members share the same bytes, so writing one lane type and reading another reinterprets the bits.

This is a type-punning view and not a vector register; no procedure takes it directly, but each member is a SIMD_Array and takes part in all of them. Lanes are in memory order, so on a little-endian target (every supported one) lane 0 of _u8 is the low byte of lane 0 of _u32.

block: Simd_128;
block._u32.data[0] = 0x04030201;
assert(block._u8.data[0] == 1 && block._u8.data[3] == 4);
assert(size_of(Simd_128) == 16);